Header File Filename Case In Linux
Prior to Prior to v5.50, the MPASM header file name of few devices
were in uppercase and most of them were in lowercase. On case in-sensitive
OS like Windows, this was not a matter of concern. On case sensitive OS
like those based on Linux, the user had to take care of matching the case
of the filename used in their #include statement to that of the actual
filename.
In order to maintain uniformity and avoid confusion, starting
from v5.50,the names of all MPASM header file (.inc) would be in lowercase.
As a consequence, assembly source files with uppercase filenames in
#include statement might fail to assemble. There are two possible ways
to fix this:
The recommended method is to change the filename of .inc file
in the #include statement to lowercase. If the user does not
wish to do this, then they can work around the issue by creating
a symbolic link to the new lowercase filename from the uppercase
filename. A shell script called createbackcompatiblelinks has
been provided in mpasmx folder on Linux to do the same.
Depending on where the user's mpasmx folder is located,
root or super-user privilege might be required.
COFF File Format Replaces COD File Format
Due to the various limitations of COD format, versions 5.3 and above
of MPASM do not generate COD format as the output of an absolute
assembly file. COFF format replaces COD format in all cases. This
should not affect ordinary users because COD format was only used
by MPLAB IDE versions prior to v8.20 to display debug information.
MPLAB IDE v8.20 and later recognize the COFF output of MPASM in
absolute mode, and this transition should not impose noticeable
change in the expected behavior of the language tool suite.
Also due to the elimination of the COD Format from MPASM ouput,
and the use of COFF format instead, new flags have been added to COFF
files that are generated by C18 v3.30 and MPASM v5.30. These flags are
only recognized by MPLINK v4.30 and above. MPLINK v4.30 and above
continue to recognize the old COFF files. However, earlier versions of
MPLINK may not recognize new COFF files.
Note to Users of Parts with External Memory Bus
The default behavior of MPLINK does not allow defining code or
data in memory address locations outside the boundaries of linker
script regions. Existing projects in absolute mode that use these
address spaces will encounter a linker error indicating that section
'.org_xx' can not fit the absolute section. The workaround for this
error is to add a new region to the default linker script to define the
user defined addresses for the linker. For more information, see the
MPLINK User's Guide. The default linker script is located at the LKR
directory at the same location where the mplink.exe executable exists.
For example, if you see the following error message in the output
window of your MPLAB IDE when building your Absolute assembly project:
Executing: "C:\MCC18\bin\mplink.exe" /p18F8527 "test.o" /z__MPLAB_BUILD=1 /o"test.cof" /M"test.map" /W /x MPLINK 4.30, Linker Copyright (c) 2009 Microchip Technology Inc.
Error - section '.org_6' can not fit the absolute section. Section '.org_6' start=0x0000c020, length=0x00000006
open the file "C:\MCC18\bin\LKR\18f8527_g.lkr" in a text editor and
add the line:
CODEPAGE NAME=unimplemented START=0xC000 END=0x1FFFFF PROTECTED
at line 32 after #FI and before the idlocs region.
This problem only applicable since MPLINK v4.30.
MPLINK Linker and MPLAB IDE Compatibility
Due to a change in COFF file format, MPASM Assembler v5.00 and later
will not be compatible with versions of MPLINK Linker prior to v4.00 or
versions of the MPLAB IDE prior to v7.21.
MPASM Assembler v5.00 and later will have backward compatibility to
earlier versions at the source level only. Any existing object files or
libraries compiled with earlier versions of the tools will not link
using new versions of the tools. They will need to be recompiled
from source.
If the user attempts to use this release with object files or
libraries compiled with earlier versions of MPLAB C18, MPLINK Linker,
and MPASM Assembler, the error message that will be received will be
similar to:
Error - Coff file format for 'C:\mcc18\lib/c018i.o' is out of date.
If the user attempts to use an old version of MPLINK Linker to link
object files or libraries compiled with this release, the error message
that will be received will be similar to:
Error - Coff file format for 'C:\mcc18\lib/c018i.o' does not appear to be a valid COFF file.
Click here for a complete listing.
THE PARTS CORRESPONDING TO THESE OPTIONS MAY NOT ALL BE
COMMERCIALLY AVAILABLE.
These can be chosen through the introductory screen, on the command
line, or in source file.
NOTES:
MPASMWIN.EXE is the 32-bit Windows version of MPASM Assembler which
is distributed with MPLAB IDE and MPLAB C18. It is supported on the
following platforms (32- and 64-bit):
- Microsoft Windows XP Professional SP3/ Windows 7 Professional/ Windows 8 Professional
MPASMX.EXE is the 32-bit version of MPASM Assembler which
is distributed with MPLAB X IDE. It is supported on the
following platforms (32- and 64-bit):
- Microsoft Windows XP Professional SP3/ Windows 7 Professional/ Windows 8 Professional
- Ubuntu 9.10
- Macintosh OS X 10.5 Intel
-
- Early adopter part support has been added. See "Devices" above.
- Several bug fixes. See "Repairs and Enhancements
" below.
- _IDLOCS directive now supports 14-bit user-id for enhanced mid-range devices
Certain enhanced mid-range devices now support 14-bit wide user-id per location. Starting from v5.62, _IDLOCS directive can accept
14-bit wide user-ids along with id location for these devices. The syntax is identical to that used for PIC18 devices to specify the user-id.
Example:
include p16f18313.inc
__idlocs _IDLOC0, 0x0123
__idlocs _IDLOC1, 0x0678
__idlocs _IDLOC2, 0x09ab
code
.
.
end
-
- Problems resolved between v5.63 and v5.65
- (MPASM-449)
- The instruction encoding for 'banksel' on enhanced mid-range devices that have more than 32 banks was incorrect.
- Problems resolved between v5.60 and v5.62:
- None
- Problems resolved between v5.58 and v5.59:
- (MPASM-434)
- "Changed "nZCD" to "ZCD" in config bits" for 12(L)F1612/13 and it is causing old source
file with this configuration setting to fail build.
- Problems resolved between v5.57 and v5.58:
- (MPASM-432)
- MPASM generates UNKNOWN ERROR with 18F config bits in absolute mode.
- Problems resolved between v5.56 and v5.57:
- (MPASM-427)
- Setting more than two config registers using
_CONFIG directive for device PIC16F1613 results in erroneous config values in hex file.
- Problems resolved between v5.55 and v5.56:
- None
- Problems resolved between v5.54 and v5.55:
- (MPASM-422)
- p16f1xxx.inc references an incorrect device
- Problems resolved between v5.53 and v5.54:
- (MPASM-417)
- p16F1xxx.inc has the 16LF1788 and 16LF1789 as IFNDEF, should be IFDEF.
- Problems resolved between v5.52 and v5.53:
- None
- Problems resolved between v5.51 and v5.52:
- None
- Problems resolved between v5.50 and v5.51:
- None
- Problems resolved between v5.49 and v5.50:
- (MPASM-410)
- All linker scripts are now in lowercase.
- Problems resolved between v5.48 and v5.49:
- (MPASM-412)
- BANKSEL directive does not work for Enhanced Baseline devices
- Problems resolved between v5.47 and v5.48:
- (MPASM-406)
- MPASM now emits error messages to console when the option /e=CON is passed to it.
- (MPASM-405)
- Program words larger than 14-bits should not be generated for 14E core (cooper devices).
Warning is issued for values greater than 14-bits.
- Problems resolved between v5.46 and v5.47:
- (UDBC-643)
- Incorrect bad ram definition in device file for 16F527.
- Problems resolved between v5.45 and v5.46:
- (MPASM-401)
- MPASM does not generate PAGESEL instructions for enhanced baseline family.
- (MPASM-396)
- Invalid config values generated by MPASM for MCP250XX devices.
- (MPASM-393)
- CONFIG Directive Error. Config directive's case sensitive behaviour.
- Problems resolved between v5.44 and v5.45:
- None
- Problems resolved between v5.43 and v5.44:
- (MPASM-383)
- Changes in CONFIG setting names for BORV values for enhanced
mid-range devices. BORV_xx notation (i.e. _BORV_25 and _BORV_19)
has been replaced with BORV_HI and BORV_LO.
- Problems resolved between v5.42 and v5.43:
- (MPASM-333)
- Incorrect bit names in 16F/LF1825. APFCON0: SS1SEL (bit 5) and
SDO1SEL (bit 6) should be SSSEL and SDOSEL.
- (MPASM-370)
- MPASM issue with SFRs in banked RAM
- (MPASM-377)
- MPASM does not link source files with more than one period in
their name.
- Problems resolved between v5.41 and v5.42:
- (MPASM-366)
- Incorrect code generated for the attached source code using
a memory device when processor selected is EEPROM8
- (MPASM-367)
- MPASM generates incorrect opcode for EECON, EEADR, and EEDATA
registers for 16F526
- (MPASM-369)
- Warning not generated for the MOVLB instruction when the
argument provided is out of range.
- Problems resolved between v5.40 and v5.41:
- (MPASM-337)
- LGOTO instruction is not working for the address ranges expecting
to set the 5-bit of the PCLATH register for 16F193x devices
- (MPASM-349)
- "Argument out of range (0000 not between 0005 and 0007)" error is
observed on building any code for the devices, 12C671, 12C672, 12CE673,
12CE674 & 16C433.
- (MPASM-350)
- "Processor type is undefined" error is observed on building any
code for the device 16C58A.
- (MPASM-356)
- Configuration Macro does not properly set some of the configuration
bits
- (MPASM-360)
- No support for EEPROM8 in resource file
- (MPASM-361)
- Build error in the include file when using PIC12C671
- Problems resolved between v5.39 and v5.40:
- None
- Problems resolved between v5.38 and v5.39:
- (MPASM-92 / 26223)
- MPASM Assembler does not correctly handle Windows CLI and DOS
command line string limitations and error diagnostics can be ambiguous
or absent.
- (MPASM-347)
- MPASMWIN hangs for absolute code projects when built using MPLAB
IDE and displays "Unknown error" dialog box when built using
command-line.
- ( MPASM-364)
- MPASM build does not like relative paths with '/' on Windows
- Problems resolved between v5.37 and v5.38:
- (MPASM-176)
- PIC16F737 Include file has PORTD and TRISD defined. It should
not since this is a 28-pin device.
- (MPASM-282)
- 16F873 header file has listed CMIF, but this device does not have
a comparator, nor is this bit defined in the data sheet.
- (MPASM-302)
- For 18F1320 Family, DDRC/TRISC, DDRD/TRISD and DDRE/TRISE do not
exist for theses parts and should be removed.
- (MPASM-304)
- Config words and bits defined different than standard way in old
INC files (18C452 Family - 18C452, 18C442, 18C252, 18C242).
The new INC files have the current config word definitions as other
PIC18 devices:
_CONFIG1L, _CONFIG1H... _CONFIG4L
Config bit setting definition example:
_LP_OSC_1H
They are different from the old INC files that had:
_CONFIG0, _CONFIG1, _CONFIG2... _CONFIG4
Example:
_LP_OSC_1
- (MPASM-305)
- Old Include files issues (18F458 Family - 18F458, 18F448, 18F258,
18F248)
18F458, 18F448 only:
IBF, OBF, IBOV, PSPMODE bits are listed as being in the PSPCON register,
they are actually in the TRISE register (there is no PSPCON register).
18F258, 18F248 only:
IBF, OBF, IBOV, PSPMODE bits are listed as being in the PSPCON register,
the bits have been removed (no Parallel Slave Port on 28-pin devices).
- (MPASM-306)
- Config words and bits defined different than standard way in old
INC files (18C858/18C658 Family).
18C858, 18C658:
The new INC files have the current config word definitions as other
PIC18 devices:
_CONFIG1L, _CONFIG1H... _CONFIG4L
Config bit setting definition example:
_LP_OSC_1H
They are different from the old INC files that had:
_CONFIG0, _CONFIG1, _CONFIG2... _CONFIG4
Example:
_LP_OSC_1
- (MPASM-307)
- Register / bits in existing INC files that have been removed for
18C858/18C658 Family.
MEMCON Register was removed (family does not support external memory)
MEMCON bits removed (family does not support external memory):
EBDIS
WAIT1
WAIT0
WM1
WM0
PORTE bits removed (family does not support external memory):
ALE
OE
WRL
WRH
- (MPASM-308)
- New INC file differences from old INC files (18C801/18C601 Family).
18C801, 18C601:
Old include files had BADRAM start at 400h.
New include files have BADRAM start at 600h.
Both are correct depending on the state of the PGRM bit in MEMCON:
400 if PGRM=1
600 if PGRM=0 (POR value)
INTCON2.INTEDG3 has been removed (no INT3).
PORTB.INT3 has been removed (no INT3).
18C801 only:
PORTH have been removed (only has 12 analog channels
AN<11:0>).
- (MPASM-320)
- Include file: removed/changed __BADRAM locations for 16F77/16F76
Family.
Removed __BADRAM locations:
H'110' - H'011F' (has ram at 110-11F)
Changed __BADRAM locations:
H'18D' - H'019F'
to
H'18D' - H'018F' (has ram at 190-19F)
- (MPASM-322)
- Config bit value corrected in INC files for 16F723A/16F722A Family.
CONFIG 1 _BOR_NSLEEP setting changed from 3DFF to 3EFF.
- (MPASM-324)
- Bit in existing INC files that has been removed (16F727 Family).
PIC16F726, PIC16F723, PIC16F722, PIC16LF726, PIC16LF723, PIC16LF722:
CPSCON1 has been removed (channel 3 does not exist on 28-pin
parts).
- (MPASM-325)
- _BOR_NSLEEP CONFIG value in existing INC files for 16F727 Family
needs to be corrected from 3DFF to 3EFF.
- (MPASM-326)
- Registers/bits removed from 16F687.
EEADRH has been removed (register does not exist on this device).
EEDATH has been removed (register does not exist on this device).
EECON1 has been removed (bit does not exist on this device).
- (MPASM-335)
- Removed erroneous bits from LCD registers from PIC18F87K90,
PIC18F86K90, PIC18F85K90, PIC18F67K90, PIC18F66K90, and PIC18F65K90.
LCDDATA11: Removed bits ADMSK<5:1>, bits do not exist in register.
LCDDATA12: Removed bits SSPM<3:0>, bits do not exist in register.
LCDDATA14: Removed bits MSK<7:0>, bits do not exist in register.
LCDDATA16: Removed bits T4OUTPS<3:0>, T4CKPS<1:0>, bits do not exist
in register.
LCDDATA19: Removed bits TMR3CS<1:0>, T3CKPS<1:0>, bits do not exist
in register.
- (MPASM-336)
- 16C715 is missing Config bit CP option. P16C715.INC has 3 options:
_CP_ALL EQU H'00CF'
_CP_50 EQU H'15DF'
_CP_OFF EQU H'3FFF'
But data sheet shows 4 options
11 = Code protection off
10 = Upper half of program memory code protected
01 = Upper 3/4th of program memory code protected
00 = All memory is code protected
- (MPASM-343)
- 16F872 CP1:CP0 config bits not supported for 01 and 10 settings but
settings are in header file.
- Problems resolved between v5.36 and v5.37:
- (MPASM-300)
- INTCON bits and Do Not Match Datasheet for 12F617
- (MPASM-312)
- 'Assembler Warning' caused by incorrect CONFIG values defined in
*.inc file for 12F617
- (MPASM-313)
- Several bit field definition in header file does not match
datasheet for 12F617. Add: STATUS bits RP0 and RP1; PMDATL bits
PMDATL0..PMDATL7; INTCON bits T0IF and T0IE; PIR1 bits CMIF and CCPIF;
PIE1 bits CMIE and CCPIE; VRCON bits FVREN and CMVREN; WPU bits
WPU0..WPU5; CMCON0 bits CMCH, CMR, CMPOL, CMOE, COUT and CMON;
CMCON1 bits CMSYNC and CMHYS.
- (MPASM-314)
- Several bit field definitions in header file do not match the
datasheet for 16F707.
Add: SSPMSK, TACON bits TAPSA, TASE, TACS, TAPS0..TAPS2; TBCON
bits TBPSA, PBSE, TBCS, and TBPS0..TBPS2.
Correct: T3CON bit TMR2CS1 should be bit TMR3CS1.
- (MPASM-315)
- Several bit field definitions in header file do not match the
datasheet for 16F/LF1946/47. Add: CPSCON0 bit CPSRM. Correct:
LCDSE0 bits SEG0..SEG7 should be bits SE0..SE7; LCDSE1 bits
SEG8..SEG15 should be SE8..SE15; LCDSE2 bits SEG16..SEG23 should
be bits SE16..SE23.
- (MPASM-316)
- Several bit field definitions in header file do not match the
datasheet for 12F/LF1822 and 16F/LF1823. Add: T1GCON bit
T1GG0_NOT_DONE; ADCON0 bit NOT_DONE; CPSCON0 bit CPSRM 16F/LF1823 ONLY;
APFCON bit CCP1SEL 16F/LF1823 ONLY; APFCON bit P1BSEL. Correct: APFCON
bit SS1SEL should be bit SSSEL; MDCARH bits MDCL0..MDCL3 should be bits
MDCH0..MDCH3, bit MDCLSYNC should be bit MDCHSYNC, bit MDCLPOL should
be bit MDCHPOL, and bit MDCLODIS should be bit MDCHLODIS.
- (MPASM-317)
- Several bit field definitions in header file do not match the
datasheet for 16F193x/LF193x. Add: T1GCON bit T1GG0_NOT_DONE; ADCON0
bit NOT_DONE; TRISE bit TRISE3; and LATE bit LATE3; Correct: LCDSE0
bits SEG0..SEG7 should be bits SE0..SE7; LCDSE1 bits SEG8..SEG15 should
be SE8..SE15; LCDSE2 bits SEG16..SEG23 should be bits SE16..SE23.
- (MPASM-318)
- Several bit field definitions in header file do not match the
datasheet for 16F/LF722A/723A. Add ADCON0 bit GO_NOT_DONE; T1GCON bit
T1GGO_NOT_DONE; SSPSTAT bits R_NOT_W and D_NOT_A; FVRCON bit FVRRDY
- Problems resolved between v5.35 and v5.36:
- (MPASM-105 / 27914)
- The assembler gives an error when the FILL macro is used with
Address - $.
- (MPASM-163)
- __IDLOCS directive does not put the User ID locations at the
correct address (0x440) for these devices. Instead it writes the
User ID locations to address 0x400.
- (MPASM-292)
- Make both FSRn and INDFn available for ADDFSR and MOVIW.
- (MPASM-298)
- Accept '-' as well as '/' in the commandline.
- (MPASM-301)
- MPASM Produces incorrect config section for EEPROM devices.
- (MPASM-303)
- The behaviour of the HIGH operator in an absolute code for PIC16
extended devices is incorrect.
- (UDBC-205)
- VCAPEN config bit settings for 16F1947 are not correct. RF0 is
the only pin VCAP goes on.
- Problems resolved between v5.34 and v5.35:
- (MPASM-36 / 18811)
- MPASMWIN.exe generates incorrect code for 'goto' targeting a local
label.
- (MPASM-175)
- Improve the error message, "Address exceeds maximum range for this
processor".
- (MPASM-273)
- Warning is generated when defining EEDATA for [16F19xx] devices in
absolute mode.
- Problems resolved between v5.33 and v5.34:
- (MPASM-280)
- MPASMWIN hangs with /q- command line option.
- (MPASM-285)
- Ambiguities in include file for the device family 18F87K90.
- Problems resolved between v5.32 and v5.33:
- None
- Problems resolved between v5.31 and v5.32:
- (MPASM-271)
- Errors in INC file for the device family 16F1827.
- Problems resolved between v5.30 and v5.31:
- (MPASM-257)
- Assembler hangs upon building a program, where the __CONFIG
directives using the config words defined in the .INC file, are
being followed by "include" directive.
- (MPASM-262)
- Add new option to allow user to see the window that used to
appear with old behaviour of /q option
The following is a list of known problems. For a list of
limitations, please see MPASM Assembler Help, Troubleshooting,
Assembler Limitations.
- (MPASM-4 / 1008)
- There are no warnings when overflow or underflow occurs during
expression evaluation.
- (MPASM-34 / 18510)
- A file register operand which is greater than the absolute max
ram address does not generate a message of any kind.
For example,
LIST P=18F452
MOVWF 0x1000
END
will assemble without warning.
- (MPASM-40 / 19703)
- The Japanese directory delimiter character on Windows XP-J and
Windows ME-J is not accepted by MPASM Assembler.
The workaround is to invoke MPASM Assembler on the command line with a
source file path which does not contain any directory delimiters.
- (MPASM-44 / 20776)
- The return value of the MPASMWIN.EXE process (returned by
'spawnvp') does not get stored in the DOS environment variable
ERRORLEVEL.
- (MPASM-47 / 20986)
- When assembling with the '/o' option, a duplicate address label
declaration causes no error, warning, or message. For example, the
program fragment
U1 IDATA
X DB 1
U2 IDATA
X DB 2
CODE
MOVWF X
assembles quietly, but the definition of X which is used in the MOVWF
instruction is not well defined.
- (MPASM-52 / 21798)
- The length of the command line argument string to mpasm.exe is
limited to about 120 characters. Anything beyond that is truncated.
Suggest using mpasmwin.exe or mpasmx.exe.
- (MPASM-54 / 22227)
- Error messages are not emitted to standard out.
- (MPASM-56 / 22387)
- MPASM Assembler cannot assemble files in Unicode format.
- (MPASM-57 / 22541)
- A warning is not emitted if the operand for the PUSHL instruction
is less than -128, only if it is less than -255. A warning should be
emitted if the operand is less than -128, since the operand is 8 bits
wide.
- (MPASM-58 / 22660)
- When assembling with '/o' and the operand of a DT directive is
relocatable but more than 8 bits wide, the linker will fill both
bytes of the directive with 16 bits of the operand (instead of
truncating the operand to 8 bits for a RETLW instruction):
UDATA 0x124
X RES 1
CODE 0x100
DT X
will generate 0x0124 at address 0x100 instead of 0x3424 (RETLW 0x24).
- (MPASM-63 / 23071)
- The LIST n=nnn directive does not properly format the listing file.
- (MPASM-67 / 23490)
- As MPASM Assembler rescans macro expressions, it searches the
substituted arguments for parameters. E.g.,
#define F(X,Y) X + Y
Y EQU 2
movlw F(Y,1)
will yield movlw 2 instead of movlw 3. After Y is substituted in
place of X, it is replaced itself by the second argument upon
rescanning.
- (MPASM-77 / 24560)
- No error or warning is produced for the following code:
bsf ,1
END
This assembles as if "bsf 0,1" was given.
- (MPASM-81 / 24794)
- MPASM Assembler generates invalid PIC18 relocation for
$+<odd offset>.
The following code, containing an invalid goto destination address,
assembles without error when generating an object file (18f452):
code 0
bra start
startscn code 0x100
start nop
goto $-1
bra $
end
causing a link-time error:
Error - file 'C:\test\mpasm\gotoneg1.o', section 'startscn', Symbol '_startscn_0102' is not word-aligned.
It can not be used as the target of a call or goto instruction.
However, the assembler generates a warning when assembling equivalent
code in absolute mode:
org 0
bra start
org 0x100
start nop
goto $-1
bra $
end
Warning[226] C:\TEST\MPASM\GOTONEG1.ASM 8 : Destination address must be word aligned
- (MPASM-99 / 27088)
- MPASM Assembler may generate an invalid COFF file when passing an
undefined constant as a macro parameter.
For example:
RM MACRO Name,Size
LOCAL i =0
Name RES 0
GLOBAL Name
WHILE i <Size
Name#v(i) RES 1
i +=1
ENDW
ENDM
myuscn UDATA
RM hello,myconstsz ; Should cause an assembly error
myconstsz equ 2
CODE
lfsr 0,hello0
END
Assembly of this code causes only a warning, but MPLINK Linker gives an
error message "reloc[0] has an invalid r_symndx." while trying to
link the COFF file.
MPASM Assembler should give an error.
To avoid this problem, the code should define 'myconstsz' before
calling the macro, as shown:
myconstsz equ 2
RM hello, myconstsz
- (MPASM-101 / 27165)
- MPASM Assembler does not give an error when ENDIF is missing; it
gives only a warning.
With a macro like:
IF (CONST)
; no ENDIF
MPASM Assembler assembles it and gives no error, only a warning.
- (MPASM-106 / 28228)
- Running the assembler on a file with a '.' in the name, other
than the '.' separating the file extension from the base name, for
example foo.bar.asm, results in a DOS error:
File not found.
Any resulting intermediate or output files will not include the
portion of the file name after the first '.' For example, the file
name above may cause files named foo.ERR, foo.COD, or foo.LST to be
created.
- (MPASM-372)
- MPASM fails to set MSB for Extended 16F1xxx devices for indirect
addressing mode, when using the HIGH directive with a program memory
label defined in a different source file using the extern qualifier.
- (MPASM-409)
- When __CONFIG macro is used to set the configuration words for PIC12F1xxx and
PIC16F1xxx devices,then MPASM v5.48 generates a warning : "Program word too large.
Truncated to core size." This can be ignored.
To invoke the assembler from the command line, execute either:
mpasmwin (MPLAB IDE)
or
mpasmx (MPLAB X IDE)
On a Windows system, you will then be given a GUI interface window.
Help on using the interface is provided on-line. The assembler can also
be invoked with parameters or through drag-and-drop. In these cases,
the interface screen is not displayed and assembly begins immediately.
On a Linux or Mac system (MPASMX only), no GUI screen is displayed,
but a list of command-line options is presented.
Correct any syntax problems, referring to the MPASM Assembler,
MPLINK Object Linker, MPLIB Object Librarian User's Guide (DS33014)
for syntax help. MPASM Assembler assembles with INHX32 as the default
hex output, and generates a listing file, error file, and .COD file.
Serial EEPROM Support:
Two "processor" selections are provided to generate byte data -
EEPROM8 and EEPROM16. Both generate data in terms of bytes, but
EEPROM8 considers a "word" to be 8 bits wide, while EEPROM16
considers a "word" to be 16 bits wide. The "program counter" is
always incremented in terms of bytes.
The default size for memory products is 128 bytes. This can be
overridden by using the LIST M=<max address> directive. Note
that <max address> is always evaluated as a decimal number.
The header file MEMORY.INC is provided to define the maximum address
for available memory devices. The format of the defined symbols is
_<device>; for example, to set the maximum memory size for a
24LCS21, use the directive LIST M=_24LCS21.
The following data generation directives are supported for
memory products:
DW FILL ORG
The behavior of other data generation directives is not guaranteed.
All other directives are unchanged.
An example of generating a file for programming a memory device is
as follows:
;*************************************************
; Generate data for a 8-bit wide memory device.
LIST P=EEPROM8, R=DECIMAL
INCLUDE "MEMORY.INC"
LIST M=_24LCS21
#DEFINE MAX_VALUE 255
ORG 0
;-------------------------------------------------
; Create a packed-byte, null terminated string.
DW "Hello World", 0
;-------------------------------------------------
; Create data representing a line. The X position
; is implied from the position of the data in the
; device. The Y values are stored in the device.
; First, define an equation for the line.
#DEFINE Line( X ) Slope * X + Y_Intercept
; Now define the values needed for the equation.
Slope EQU 10
Y_Intercept EQU 5
; Declare and initialize the X and Y values.
VARIABLE X = 0, Y = Line( X )
; Generate values until the maximum Y value is
; reached or the device is filled up.
WHILE (Y <= MAX_VALUE) && ($ <= _24LCS21)
DW Y
X = X + 1
Y = Line( X )
ENDW
;-------------------------------------------------
; Perform some checking based on the line data
; generated above.
; If the device filled up before the end of the
; line was reached, generate an error. Otherwise,
; if the device is almost out of room, generate a
; message.
IF (Y < MAX_VALUE)
ERROR "Device is full."
ELSE
IF (($+10) > _24LCS21)
MESSG "Device is nearly full."
ENDIF
ENDIF
;-------------------------------------------------
; Fill the rest of the device with zeroes.
FILL 0, _24LCS21 - $ + 1
END
CLRW COMMAND:
The CLRW encoding was changed on all 14-bit core devices from
0x0100 to 0x0103 (v1.40 and later). This will not affect the expected
operation of the instruction, but it will change the value for the
instruction in the hex file and therefore the checksum.
WARNING MESSAGE:
The text for Message #302 was modified to explain more clearly that
bank indication bits are stripped when assembling instructions that
access file registers. The appropriate bank must be selected by the
appropriate bank selection bits. For example, 14-bit core devices
contain the lower seven bits of the file register address in the
opcode, with two bank selection bits in the STATUS register. The
message was changed from:
Argument out of range. Least significant bits used.
to:
Register in operand not in bank 0. Ensure that bank bits are correct.
END DIRECTIVE:
Take care to not use the END directive in a macro. If the END
directive is encountered in a macro, it can cause the assembler to
loop indefinitely. Macros should be terminated with the ENDM
directive.
HIGH DIRECTIVE:
While using the assembler for enhanced mid-range devices and
the HIGH directive with the movlw instruction (i.e., movlw high xx),
the value returned has its most-significant bit (MSb) set if
xx is in program memory. This makes it easier to read
the program flash memory through the FSR by using the value loaded
to the working register. However, when the HIGH directive is used with
the movlp instruction, the most significant bit is ignored as
the movlp instruction encodes a 7-bit wide literal.
Microchip provides online support via our home page at:
http://www.microchip.com
Technical support is available through the web site at:
http://support.microchip.com
A forum for discussion of Microchip products and tools is
available at:
http://forum.microchip.com